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12_組み込みハードエンジニア/Embedded System Hardware Engineer

*English follows Japanese.






  • 必須条件
    • 学歴:高専又は大学卒業以上
    • FPGAやASICを用いたシステムの開発経験があり、VHDLやVerilogなどのハードウェア記述言語のスキルが高いこと。
    • 高速デジタル信号(100MHz以上)の電子回路設計の経験を有すること。
  • 歓迎条件
    • 高速デジタル信号(100MHz以上)のアートワーク設計
  • その他
    • 衛星の組み込みハードウェアの経験は不問



  • 給与: 経験及び能力に応じて面談の上、採用時に決定
  • 賞与: 年2回(人事考課による)
  • 手当
    • 生涯設計手当
    • 生活手当
    • 通勤手当
  • 給与改定: 年1回(人事考課による)
  • 勤務時間: 裁量労働制
  • 休日: 完全週休二日制(土・日)、祝祭日、年次有給休暇、年末年始休暇、慶弔休暇等



応募フォームのResumeには履歴書・職務経歴書(1つのファイルにまとめてください。)を添付し、Cover Letterの欄には志望動機や自己PR等を自由に記入してください。




Design, implementation and operation of satellite embedded system hardware. Knowledge and skills specific to satellite operation and its data processing system is not mandatory at the time of application.



  • Mandatory
    • University or college degree
    • Work experience in development of hardware with FPGA or ASIC.
    • Skilled in hardware description language such as VHDL and Verilog.
    • Experience in design of high-speed digital signal circuit (100+MHz).
  • Desirable
    • Experience in design of high-speed digital signal PCB artwork (100+MHz).
    • Business-level Japanese proficiency.
  • Optional
    • Knowledge and skills specific to satellite embedded system.



  • Salary: Depends on your experiences and abilities. Will be decided based on the interviews.
  • Bonus: Twice a year (decided based on the individual’s performance and the company’s profit).
  • Allowance
    • Life design allowance
    • House allowance
    • Commuting allowance
  • Pay Revision: Once a year (decided based on the individual’s performance).
  • Working Hours:  Discretionary labor system
  • Holidays: Saturdays, Sundays, Japanese national holidays and New Year holidays. Additionally annual paid leave and special leave for weddings, funerals, etc. are available.
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